function macroCog4SetControlRegisters:
    useregset hub
    useregset cog
    input I instr_dst_input
    input I outp_cog_alu_r_input
    body:
        if (eq32 instr_dst_input 0I1f4):
            true:
                let outa outp_cog_alu_r_input
        if (eq32 instr_dst_input 0I1f6):
            true:
                let dira outp_cog_alu_r_input
        if (eq32 instr_dst_input 0I1ff):
            true:
                let reg_cog_vid_vscl_pixelclocks (and32 (shr32 outp_cog_alu_r_input 0Ic) 0Iff)
                let reg_cog_vid_vscl_frameclocks (and32 outp_cog_alu_r_input 0Ifff)
        if (eq32 instr_dst_input 0I1fe):
            true:
                let reg_cog_vid_vcfg_vmode (and32 (shr32 outp_cog_alu_r_input 0I1d) 0I3)
                let reg_cog_vid_vcfg_chroma (and32 (shr32 outp_cog_alu_r_input 0I1a) 0I7)
                let reg_cog_vid_vcfg_auralsub (and32 (shr32 outp_cog_alu_r_input 0I17) 0I7)
                let reg_cog_vid_vcfg_vgroup (shl32 (and32 (shr32 outp_cog_alu_r_input 0I9) 0I3) 0I3)
                let reg_cog_vid_vcfg_vpins (and32 outp_cog_alu_r_input 0Iff)
        if (eq32 instr_dst_input 0I1f9):
            true:
                let reg_cog_ctrb_ctrmode (shr32 outp_cog_alu_r_input 0I1a)
                let reg_cog_ctrb_ctrplldiv (and32 (shr32 outp_cog_alu_r_input 0I17) 0I7)
                let reg_cog_ctrb_ctrbmask (shl32 0I1 (and32 (shr32 outp_cog_alu_r_input 0I9) 0I1f))
                let reg_cog_ctrb_ctramask (shl32 0I1 (and32 outp_cog_alu_r_input 0I1f))
        if (eq32 instr_dst_input 0I1fb):
            true:
                let reg_cog_ctrb_frequency outp_cog_alu_r_input
        if (eq32 instr_dst_input 0I1fd):
            true:
                let reg_cog_ctrb_phase (cast64 outp_cog_alu_r_input)
        if (eq32 instr_dst_input 0I1f8):
            true:
                let reg_cog_ctra_ctrmode (shr32 outp_cog_alu_r_input 0I1a)
                let reg_cog_ctra_ctrplldiv (and32 (shr32 outp_cog_alu_r_input 0I17) 0I7)
                let reg_cog_ctra_ctrbmask (shl32 0I1 (and32 (shr32 outp_cog_alu_r_input 0I9) 0I1f))
                let reg_cog_ctra_ctramask (shl32 0I1 (and32 outp_cog_alu_r_input 0I1f))
        if (eq32 instr_dst_input 0I1fa):
            true:
                let reg_cog_ctra_frequency outp_cog_alu_r_input
        if (eq32 instr_dst_input 0I1fc):
            true:
                let reg_cog_ctra_phase (cast64 outp_cog_alu_r_input)

function cogBusSel_SX:
    useregset hub
    useregset cog
    body:
        let bus_state_wire (jump 0I0)
        let bus_ashr2_wire (and32 (add32 progctr p_reg) 0I3fff)

function cogBusSel_SH:
    useregset hub
    useregset cog
    body:
        let bus_state_wire (jump 0I1)
        let bus_ashr2_wire (and32 (add32 progctr p_reg) 0I3fff)

function cogBusSel_RX:
    useregset hub
    useregset cog
    body:
        let bus_state_wire (lookupJump (or32 (and32 source 0I7) (shl32 (and32 (shr32 instruction_reg 0I1a) 0I3) 0I3)) 0I2 0I4 0I6 0I8 0I2 0I4 0I6 0I8 0Ia 0Ia 0Ic 0Ic 0Ia 0Ia 0Ic 0Ic 0Ie 0Ie 0Ie 0Ie 0Ie 0Ie 0Ie 0Ie 0I10 0I10 0I10 0I10 0I10 0I10 0I10 0I10)
        let bus_ashr2_wire (and32 (shr32 source 0I2) 0I3fff)

function cogBusSel_RH:
    useregset hub
    useregset cog
    body:
        let bus_state_wire (lookupJump (or32 (or32 (and32 source 0I7) (shl32 (and32 (shr32 instruction_reg 0I1a) 0I3) 0I3)) (mux32 (testBit32 instruction_reg 0I17) 0I0 0I20)) 0I3 0I5 0I7 0I9 0I3 0I5 0I7 0I9 0Ib 0Ib 0Id 0Id 0Ib 0Ib 0Id 0Id 0If 0If 0If 0If 0If 0If 0If 0If 0I11 0I12 0I13 0I14 0I15 0I16 0I17 0I18 0I19 0I1a 0I1b 0I1c 0I19 0I1a 0I1b 0I1c 0I1d 0I1d 0I1e 0I1e 0I1d 0I1d 0I1e 0I1e 0I1f 0I1f 0I1f 0I1f 0I1f 0I1f 0I1f 0I1f 0I11 0I12 0I13 0I14 0I15 0I16 0I17 0I18)
        let bus_ashr2_wire (and32 (shr32 source 0I2) 0I3fff)
        let bus_d_wire dest

function macroCogReset:
    useregset hub
    useregset cog
    body:
        let reg_cog_ctra_ctrmode 0I0
        let reg_cog_ctra_ctrplldiv 0I0
        let reg_cog_ctra_ctrbmask 0I1
        let reg_cog_ctra_ctramask 0I1
        let reg_cog_ctrb_ctrmode 0I0
        let reg_cog_ctrb_ctrplldiv 0I0
        let reg_cog_ctrb_ctrbmask 0I1
        let reg_cog_ctrb_ctramask 0I1
        let reg_cog_vid_vcfg_vmode 0I0
        let reg_cog_vid_vcfg_chroma 0I0
        let reg_cog_vid_lastvidclk false
        let reg_cog_vid_vcfg_auralsub 0I0
        let reg_cog_vid_vcfg_vgroup 0I0
        let reg_cog_vid_vcfg_vpins 0I0
        let p_reg 0I0
        let zflag false
        let cflag false
        let dira 0I0
        let compound_statex (jump 0I0)
        let bus_sel_state (jump 0I0)
        call (cogUpdateAllDynamicFunctions )

function cogNegedgeEna:
    useregset hub
    useregset cog
    body:
        call (macroCogReset )

function cogRst:
    useregset hub
    useregset cog
    body:
        call (macroCogReset )
        let progctr 0I3e00

function cogPosedgeEna:
    useregset hub
    useregset cog
    body:
        let compound_statex (jump 0I1)
        let bus_sel_state (jump 0I0)
