function cogEvalMain:
    useregset cog
    input B nres
    input B ena_bus
    input B ptr_w
    input I ptr_d
    input B ena
    input B bus_sel
    input I bus_q
    input B bus_c
    input B bus_ack
    input I cnt
    input I pll_in
    input I pin_in
    input B posedge_clk_cog
    input B negedge_nres
    input B negedge_ena
    input B posedge_clk_pll
    input B posedge_vclk
    input B posedge_snc1
    output B bus_r
    output B bus_e
    output B bus_w
    output I bus_s
    output I bus_a
    output I bus_d
    output I pin_out
    output I pin_dir
    local I sx
    local I px
    local I i
    local I instr_src
    local I instr_dst
    local I instr_opcode
    local B jump
    local B cond
    local B jump_cancel
    local B wio
    local B match_prev
    local B in_cog_alu_ci
    local B in_cog_alu_zi
    local L loc_cog_alu_tmpRes64
    local I loc_cog_alu_tmpRes32
    local B outp_cog_alu_wr
    local I outp_cog_alu_r
    local B outp_cog_alu_co
    local B outp_cog_alu_zo
    local L outp_cog_ctra_phs
    local I outp_cog_ctra_pin_out
    local L outp_cog_ctrb_phs
    local I outp_cog_ctrb_pin_out
    local I loc_cog_vid_local_colormod
    local B loc_cog_vid_local_enable
    local B loc_cog_vid_local_new_set
    local B loc_cog_vid_local_new_cnt
    local B loc_cog_vid_local_capr_next
    local B loc_cog_vid_local_colorphs
    local B outp_cog_vid_ack
    local I outp_cog_vid_pin_out
    local I in_cog_ram_a
    local I outp_cog_ram_q
    body:
        let i (mux32 running instruction_reg (or32 0I8840000 (shl32 p_reg 0I9)))
        let instr_opcode (and32 (shr32 i 0I1a) 0I3f)
        let bus_r false
        let bus_e false
        let bus_w false
        let bus_s 0I0
        let bus_a 0I0
        let bus_d 0I0
        if bus_sel:
            true:
                let bus_r running
                let bus_e (andB (eq32 state 0I5) (eq32 (and32 instr_opcode 0I3c) 0I0))
                let bus_w (notB (testBit32 i 0I17))
                let bus_s (and32 instr_opcode 0I3)
                let bus_a (mux32 running (and32 source 0Iffff) (or32 (and32 (shl32 (add32 (and32 progctr 0Ifffff) p_reg) 0I2) 0Iffff) (and32 source 0I3)))
                let bus_d dest
        let instr_dst (and32 (shr32 i 0I9) 0I1ff)
        let instr_src (and32 i 0I1ff)
        let in_cog_alu_ci (testBit32 flags 0I1)
        let in_cog_alu_zi (testBit32 flags 0I0)
        let outp_cog_alu_wr true
        switch instr_opcode:
            case 0I0 0I1 0I2 0I3 0I4 0I5 0I6 0I7:
                let outp_cog_alu_r (mux32 (orB running (neq32 (and32 p_reg 0I1f0) 0I1f0)) bus_q 0I0)
                let outp_cog_alu_co bus_c
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I8:
                let outp_cog_alu_r (or32 (shr32 dest (and32 source 0I1f)) (shl32 dest (sub32 0I20 (and32 source 0I1f))))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (eq32 (and32 dest 0I1) 0I1)
            case 0I9:
                let outp_cog_alu_r (or32 (shl32 dest (and32 source 0I1f)) (shr32 dest (sub32 0I20 (and32 source 0I1f))))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (neq32 (and32 dest 0I80000000) 0I0)
            case 0Ia:
                let outp_cog_alu_r (shr32 dest (and32 source 0I1f))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (eq32 (and32 dest 0I1) 0I1)
            case 0Ib:
                let outp_cog_alu_r (shl32 dest (and32 source 0I1f))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (neq32 (and32 dest 0I80000000) 0I0)
            case 0Ic:
                let outp_cog_alu_r (shr32 dest (and32 source 0I1f))
                if in_cog_alu_ci:
                    true:
                        let outp_cog_alu_r (or32 outp_cog_alu_r (shl32 0Iffffffff (sub32 0I20 (and32 source 0I1f))))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (eq32 (and32 dest 0I1) 0I1)
            case 0Id:
                let outp_cog_alu_r (shl32 dest (and32 source 0I1f))
                if in_cog_alu_ci:
                    true:
                        let outp_cog_alu_r (or32 outp_cog_alu_r (shr32 0Iffffffff (sub32 0I20 (and32 source 0I1f))))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (neq32 (and32 dest 0I80000000) 0I0)
            case 0Ie:
                let outp_cog_alu_r (shr32 dest (and32 source 0I1f))
                if (testBit32 dest 0I1f):
                    true:
                        let outp_cog_alu_r (or32 outp_cog_alu_r (shl32 0Iffffffff (sub32 0I20 (and32 source 0I1f))))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (eq32 (and32 dest 0I1) 0I1)
            case 0If:
                let outp_cog_alu_r (or32 (shr32 (and32 dest 0Iaaaaaaaa) 0I1) (shl32 (and32 dest 0I55555555) 0I1))
                let outp_cog_alu_r (or32 (shr32 (and32 outp_cog_alu_r 0Icccccccc) 0I2) (shl32 (and32 outp_cog_alu_r 0I33333333) 0I2))
                let outp_cog_alu_r (or32 (shr32 (and32 outp_cog_alu_r 0If0f0f0f0) 0I4) (shl32 (and32 outp_cog_alu_r 0If0f0f0f) 0I4))
                let outp_cog_alu_r (or32 (shr32 (and32 outp_cog_alu_r 0Iff00ff00) 0I8) (shl32 (and32 outp_cog_alu_r 0Iff00ff) 0I8))
                let outp_cog_alu_r (shr32 (or32 (shr32 outp_cog_alu_r 0I10) (shl32 outp_cog_alu_r 0I10)) (and32 source 0I1f))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (eq32 (and32 dest 0I1) 0I1)
            case 0I10:
                let outp_cog_alu_co (sgnle32 dest source)
                let outp_cog_alu_r source
                let outp_cog_alu_wr outp_cog_alu_co
                let outp_cog_alu_zo (eq32 source 0I0)
            case 0I11:
                let outp_cog_alu_co (sgnle32 dest source)
                let outp_cog_alu_r source
                let outp_cog_alu_wr (notB outp_cog_alu_co)
                let outp_cog_alu_zo (eq32 source 0I0)
            case 0I12:
                let outp_cog_alu_co (le32 dest source)
                let outp_cog_alu_r source
                let outp_cog_alu_wr outp_cog_alu_co
                let outp_cog_alu_zo (eq32 source 0I0)
            case 0I13:
                let outp_cog_alu_co (le32 dest source)
                let outp_cog_alu_r source
                let outp_cog_alu_wr (notB outp_cog_alu_co)
                let outp_cog_alu_zo (eq32 source 0I0)
            case 0I14:
                let outp_cog_alu_co (le32 dest source)
                let outp_cog_alu_r (or32 (and32 dest 0Ifffffe00) (and32 source 0I1ff))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I15:
                let outp_cog_alu_co (le32 dest source)
                let outp_cog_alu_r (or32 (and32 dest 0Ifffc01ff) (shl32 (and32 source 0I1ff) 0I9))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I16:
                let outp_cog_alu_co (le32 dest source)
                let outp_cog_alu_r (or32 (and32 dest 0I7fffff) (shl32 (and32 source 0I1ff) 0I17))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I17:
                let outp_cog_alu_co (le32 dest source)
                let outp_cog_alu_r (or32 (and32 dest 0Ifffffe00) p_reg)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I18:
                let outp_cog_alu_r (and32 dest source)
                let loc_cog_alu_tmpRes32 (xor32 outp_cog_alu_r (shr32 outp_cog_alu_r 0I10))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I8))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I4))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I2))
                let outp_cog_alu_co (testBit32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I1)) 0I0)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I19:
                let outp_cog_alu_r (and32 dest (invert32 source))
                let loc_cog_alu_tmpRes32 (xor32 outp_cog_alu_r (shr32 outp_cog_alu_r 0I10))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I8))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I4))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I2))
                let outp_cog_alu_co (testBit32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I1)) 0I0)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I1a:
                let outp_cog_alu_r (or32 dest source)
                let loc_cog_alu_tmpRes32 (xor32 outp_cog_alu_r (shr32 outp_cog_alu_r 0I10))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I8))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I4))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I2))
                let outp_cog_alu_co (testBit32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I1)) 0I0)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I1b:
                let outp_cog_alu_r (xor32 dest source)
                let loc_cog_alu_tmpRes32 (xor32 outp_cog_alu_r (shr32 outp_cog_alu_r 0I10))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I8))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I4))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I2))
                let outp_cog_alu_co (testBit32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I1)) 0I0)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I1c:
                let outp_cog_alu_r (mux32 in_cog_alu_ci (or32 dest source) (and32 dest (invert32 source)))
                let loc_cog_alu_tmpRes32 (xor32 outp_cog_alu_r (shr32 outp_cog_alu_r 0I10))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I8))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I4))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I2))
                let outp_cog_alu_co (testBit32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I1)) 0I0)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I1d:
                let outp_cog_alu_r (mux32 (notB in_cog_alu_ci) (or32 dest source) (and32 dest (invert32 source)))
                let loc_cog_alu_tmpRes32 (xor32 outp_cog_alu_r (shr32 outp_cog_alu_r 0I10))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I8))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I4))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I2))
                let outp_cog_alu_co (testBit32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I1)) 0I0)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I1e:
                let outp_cog_alu_r (mux32 in_cog_alu_zi (or32 dest source) (and32 dest (invert32 source)))
                let loc_cog_alu_tmpRes32 (xor32 outp_cog_alu_r (shr32 outp_cog_alu_r 0I10))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I8))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I4))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I2))
                let outp_cog_alu_co (testBit32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I1)) 0I0)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I1f:
                let outp_cog_alu_r (mux32 (notB in_cog_alu_zi) (or32 dest source) (and32 dest (invert32 source)))
                let loc_cog_alu_tmpRes32 (xor32 outp_cog_alu_r (shr32 outp_cog_alu_r 0I10))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I8))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I4))
                let loc_cog_alu_tmpRes32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I2))
                let outp_cog_alu_co (testBit32 (xor32 loc_cog_alu_tmpRes32 (shr32 loc_cog_alu_tmpRes32 0I1)) 0I0)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I20:
                let loc_cog_alu_tmpRes64 (add64 (cast64 dest) (cast64 source))
                let outp_cog_alu_r (lower32 loc_cog_alu_tmpRes64)
                let outp_cog_alu_co (testBit64 loc_cog_alu_tmpRes64 0I20)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I21:
                let loc_cog_alu_tmpRes64 (sub64 (cast64 dest) (cast64 source))
                let outp_cog_alu_r (lower32 loc_cog_alu_tmpRes64)
                let outp_cog_alu_co (testBit64 loc_cog_alu_tmpRes64 0I20)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I22:
                if (testBit32 source 0I1f):
                    true:
                        let loc_cog_alu_tmpRes64 (add64 (cast64 dest) (cast64 (sub32 0I0 source)))
                        let outp_cog_alu_co (notB (testBit64 loc_cog_alu_tmpRes64 0I20))
                    false:
                        let loc_cog_alu_tmpRes64 (add64 (cast64 dest) (cast64 source))
                        let outp_cog_alu_co (testBit64 loc_cog_alu_tmpRes64 0I20)
                let outp_cog_alu_r (lower32 loc_cog_alu_tmpRes64)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I23:
                if (testBit32 source 0I1f):
                    true:
                        let loc_cog_alu_tmpRes64 (sub64 (cast64 dest) (cast64 (sub32 0I0 source)))
                        let outp_cog_alu_co (notB (testBit64 loc_cog_alu_tmpRes64 0I20))
                    false:
                        let loc_cog_alu_tmpRes64 (sub64 (cast64 dest) (cast64 source))
                        let outp_cog_alu_co (testBit64 loc_cog_alu_tmpRes64 0I20)
                let outp_cog_alu_r (lower32 loc_cog_alu_tmpRes64)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I24:
                let loc_cog_alu_tmpRes64 (add64 (add64 (and64 (add64 (cast64 dest) 0L80000000) 0L17fffffff) (and64 (add64 (cast64 (mux32 in_cog_alu_ci (invert32 source) source)) 0L80000000) 0L17fffffff)) (cast64 (mux32 in_cog_alu_ci 0I80000001 0I80000000)))
                let outp_cog_alu_co (notB (testBit32 (xor32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I21)) (shr32 (lower32 loc_cog_alu_tmpRes64) 0I1f)) 0I0))
                let outp_cog_alu_r (or32 (and32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I1)) 0I80000000) (and32 (lower32 loc_cog_alu_tmpRes64) 0I7fffffff))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I25:
                let loc_cog_alu_tmpRes64 (add64 (add64 (and64 (add64 (cast64 dest) 0L80000000) 0L17fffffff) (and64 (add64 (cast64 (mux32 in_cog_alu_ci source (invert32 source))) 0L80000000) 0L17fffffff)) (cast64 (mux32 in_cog_alu_ci 0I80000000 0I80000001)))
                let outp_cog_alu_co (notB (testBit32 (xor32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I21)) (shr32 (lower32 loc_cog_alu_tmpRes64) 0I1f)) 0I0))
                let outp_cog_alu_r (or32 (and32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I1)) 0I80000000) (and32 (lower32 loc_cog_alu_tmpRes64) 0I7fffffff))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I26:
                let loc_cog_alu_tmpRes64 (add64 (add64 (and64 (add64 (cast64 dest) 0L80000000) 0L17fffffff) (and64 (add64 (cast64 (mux32 in_cog_alu_zi (invert32 source) source)) 0L80000000) 0L17fffffff)) (cast64 (mux32 in_cog_alu_zi 0I80000001 0I80000000)))
                let outp_cog_alu_co (notB (testBit32 (xor32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I21)) (shr32 (lower32 loc_cog_alu_tmpRes64) 0I1f)) 0I0))
                let outp_cog_alu_r (or32 (and32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I1)) 0I80000000) (and32 (lower32 loc_cog_alu_tmpRes64) 0I7fffffff))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I27:
                let loc_cog_alu_tmpRes64 (add64 (add64 (and64 (add64 (cast64 dest) 0L80000000) 0L17fffffff) (and64 (add64 (cast64 (mux32 in_cog_alu_zi source (invert32 source))) 0L80000000) 0L17fffffff)) (cast64 (mux32 in_cog_alu_zi 0I80000000 0I80000001)))
                let outp_cog_alu_co (notB (testBit32 (xor32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I21)) (shr32 (lower32 loc_cog_alu_tmpRes64) 0I1f)) 0I0))
                let outp_cog_alu_r (or32 (and32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I1)) 0I80000000) (and32 (lower32 loc_cog_alu_tmpRes64) 0I7fffffff))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I28:
                let outp_cog_alu_r source
                let outp_cog_alu_zo (eq32 source 0I0)
                let outp_cog_alu_co (testBit32 source 0I1f)
            case 0I29:
                let outp_cog_alu_r (sub32 0I0 source)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (testBit32 source 0I1f)
            case 0I2a:
                let outp_cog_alu_co (testBit32 source 0I1f)
                let outp_cog_alu_r (mux32 outp_cog_alu_co (sub32 0I0 source) source)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I2b:
                let outp_cog_alu_co (testBit32 source 0I1f)
                let outp_cog_alu_r (mux32 outp_cog_alu_co source (sub32 0I0 source))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I2c:
                let outp_cog_alu_r (mux32 in_cog_alu_ci (sub32 0I0 source) source)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (testBit32 source 0I1f)
            case 0I2d:
                let outp_cog_alu_r (mux32 in_cog_alu_ci source (sub32 0I0 source))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (testBit32 source 0I1f)
            case 0I2e:
                let outp_cog_alu_r (mux32 in_cog_alu_zi (sub32 0I0 source) source)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (testBit32 source 0I1f)
            case 0I2f:
                let outp_cog_alu_r (mux32 in_cog_alu_zi source (sub32 0I0 source))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
                let outp_cog_alu_co (testBit32 source 0I1f)
            case 0I30:
                let loc_cog_alu_tmpRes64 (add64 (add64 (and64 (add64 (cast64 dest) 0L80000000) 0L17fffffff) (and64 (add64 (cast64 (invert32 source)) 0L80000000) 0L17fffffff)) 0L80000001)
                let outp_cog_alu_r (or32 (and32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I1)) 0I80000000) (and32 (lower32 loc_cog_alu_tmpRes64) 0I7fffffff))
                let outp_cog_alu_co (neqB (eq32 (and32 (shr32 outp_cog_alu_r 0I1f) 0I1) 0I1) (notB (testBit32 (xor32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I21)) (shr32 (lower32 loc_cog_alu_tmpRes64) 0I1f)) 0I0)))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I31:
                let loc_cog_alu_tmpRes64 (add64 (add64 (and64 (add64 (cast64 dest) 0L80000000) 0L17fffffff) (and64 (add64 (cast64 (invert32 source)) 0L80000000) 0L17fffffff)) (cast64 (mux32 in_cog_alu_ci 0I80000000 0I80000001)))
                let outp_cog_alu_r (or32 (and32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I1)) 0I80000000) (and32 (lower32 loc_cog_alu_tmpRes64) 0I7fffffff))
                let outp_cog_alu_co (neqB (eq32 (and32 (shr32 outp_cog_alu_r 0I1f) 0I1) 0I1) (notB (testBit32 (xor32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I21)) (shr32 (lower32 loc_cog_alu_tmpRes64) 0I1f)) 0I0)))
                let outp_cog_alu_zo (andB in_cog_alu_zi (eq32 outp_cog_alu_r 0I0))
            case 0I32:
                let loc_cog_alu_tmpRes64 (add64 (cast64 dest) (add64 (cast64 source) (cast64 (mux32 in_cog_alu_ci 0I1 0I0))))
                let outp_cog_alu_r (lower32 loc_cog_alu_tmpRes64)
                let outp_cog_alu_co (testBit64 loc_cog_alu_tmpRes64 0I20)
                let outp_cog_alu_zo (andB in_cog_alu_zi (eq32 outp_cog_alu_r 0I0))
            case 0I33:
                let loc_cog_alu_tmpRes64 (sub64 (cast64 dest) (add64 (cast64 source) (cast64 (mux32 in_cog_alu_ci 0I1 0I0))))
                let outp_cog_alu_r (lower32 loc_cog_alu_tmpRes64)
                let outp_cog_alu_co (testBit64 loc_cog_alu_tmpRes64 0I20)
                let outp_cog_alu_zo (andB in_cog_alu_zi (eq32 outp_cog_alu_r 0I0))
            case 0I34:
                let loc_cog_alu_tmpRes64 (add64 (add64 (and64 (add64 (cast64 dest) 0L80000000) 0L17fffffff) (and64 (add64 (cast64 source) 0L80000000) 0L17fffffff)) 0L80000000)
                let outp_cog_alu_r (or32 (and32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I1)) 0I80000000) (and32 (lower32 loc_cog_alu_tmpRes64) 0I7fffffff))
                let outp_cog_alu_co (notB (testBit32 (xor32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I21)) (shr32 (lower32 loc_cog_alu_tmpRes64) 0I1f)) 0I0))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I35:
                let loc_cog_alu_tmpRes64 (add64 (add64 (and64 (add64 (cast64 dest) 0L80000000) 0L17fffffff) (and64 (add64 (cast64 (invert32 source)) 0L80000000) 0L17fffffff)) 0L80000001)
                let outp_cog_alu_r (or32 (and32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I1)) 0I80000000) (and32 (lower32 loc_cog_alu_tmpRes64) 0I7fffffff))
                let outp_cog_alu_co (notB (testBit32 (xor32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I21)) (shr32 (lower32 loc_cog_alu_tmpRes64) 0I1f)) 0I0))
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I36:
                let loc_cog_alu_tmpRes64 (add64 (add64 (and64 (add64 (cast64 dest) 0L80000000) 0L17fffffff) (and64 (add64 (cast64 source) 0L80000000) 0L17fffffff)) (cast64 (mux32 in_cog_alu_ci 0I80000001 0I80000000)))
                let outp_cog_alu_r (or32 (and32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I1)) 0I80000000) (and32 (lower32 loc_cog_alu_tmpRes64) 0I7fffffff))
                let outp_cog_alu_co (notB (testBit32 (xor32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I21)) (shr32 (lower32 loc_cog_alu_tmpRes64) 0I1f)) 0I0))
                let outp_cog_alu_zo (andB in_cog_alu_zi (eq32 outp_cog_alu_r 0I0))
            case 0I37:
                let loc_cog_alu_tmpRes64 (add64 (add64 (and64 (add64 (cast64 dest) 0L80000000) 0L17fffffff) (and64 (add64 (cast64 (invert32 source)) 0L80000000) 0L17fffffff)) (cast64 (mux32 in_cog_alu_ci 0I80000000 0I80000001)))
                let outp_cog_alu_r (or32 (and32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I1)) 0I80000000) (and32 (lower32 loc_cog_alu_tmpRes64) 0I7fffffff))
                let outp_cog_alu_co (notB (testBit32 (xor32 (lower32 (shr64 loc_cog_alu_tmpRes64 0I21)) (shr32 (lower32 loc_cog_alu_tmpRes64) 0I1f)) 0I0))
                let outp_cog_alu_zo (andB in_cog_alu_zi (eq32 outp_cog_alu_r 0I0))
            case 0I38:
                let outp_cog_alu_r (lower32 (sub64 (cast64 dest) (cast64 source)))
                let outp_cog_alu_co (leq32 source dest)
                let outp_cog_alu_wr outp_cog_alu_co
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I39:
                let outp_cog_alu_r (sub32 dest 0I1)
                let outp_cog_alu_co (eq32 dest 0I0)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I3a:
                let outp_cog_alu_r dest
                let outp_cog_alu_co false
                let outp_cog_alu_zo (eq32 dest 0I0)
            case 0I3b:
                let outp_cog_alu_r dest
                let outp_cog_alu_co false
                let outp_cog_alu_zo (eq32 dest 0I0)
            case 0I3c:
                let loc_cog_alu_tmpRes64 (add64 (cast64 dest) (cast64 source))
                let outp_cog_alu_r (lower32 loc_cog_alu_tmpRes64)
                let outp_cog_alu_co (testBit64 loc_cog_alu_tmpRes64 0I20)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I3d:
                let loc_cog_alu_tmpRes64 (add64 (cast64 dest) (add64 (cast64 source) 0L1))
                let outp_cog_alu_r (lower32 loc_cog_alu_tmpRes64)
                let outp_cog_alu_co (testBit64 loc_cog_alu_tmpRes64 0I20)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I3e:
                let loc_cog_alu_tmpRes64 (add64 (cast64 dest) (cast64 source))
                let outp_cog_alu_r (lower32 loc_cog_alu_tmpRes64)
                let outp_cog_alu_co (testBit64 loc_cog_alu_tmpRes64 0I20)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
            case 0I3f:
                let loc_cog_alu_tmpRes64 (add64 (cast64 dest) (cast64 source))
                let outp_cog_alu_r (lower32 loc_cog_alu_tmpRes64)
                let outp_cog_alu_co (testBit64 loc_cog_alu_tmpRes64 0I20)
                let outp_cog_alu_zo (eq32 outp_cog_alu_r 0I0)
        let cond (andB (notB cancel) (eq32 (and32 (shr32 (and32 (shr32 i 0I12) 0If) flags) 0I1) 0I1))
        if (orB (eq32 state 0I3) (eq32 state 0I4)):
            true:
                let jump true
                if (eq32 instr_opcode 0I17):
                    true:
                        let jump_cancel false
                    false:
                        if (eq32 instr_opcode 0I39):
                            true:
                                let jump_cancel (eq32 dest 0I1)
                            false:
                                if (eq32 instr_opcode 0I3a):
                                    true:
                                        let jump_cancel (eq32 dest 0I0)
                                    false:
                                        if (eq32 instr_opcode 0I3b):
                                            true:
                                                let jump_cancel (neq32 dest 0I0)
                                            false:
                                                let jump false
                let wio (andB (andB (eq32 state 0I4) cond) (testBit32 i 0I17))
        let outp_cog_ctra_phs reg_cog_ctra_phase
        let outp_cog_ctra_pin_out 0I0
        switch reg_cog_ctra_ctrmode:
            case 0I0:
            case 0I1:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I2:
                if reg_cog_ctra_pll_saved:
                    true:
                        let outp_cog_ctra_pin_out (shl32 0I1 reg_cog_ctra_ctrapin)
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I3:
                let outp_cog_ctra_pin_out (shl32 0I1 (mux32 reg_cog_ctra_pll_saved reg_cog_ctra_ctrapin reg_cog_ctra_ctrbpin))
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I4:
                if (testBit64 reg_cog_ctra_phase 0I1f):
                    true:
                        let outp_cog_ctra_pin_out (shl32 0I1 reg_cog_ctra_ctrapin)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I5:
                let outp_cog_ctra_pin_out (shl32 0I1 (mux32 (testBit64 reg_cog_ctra_phase 0I1f) reg_cog_ctra_ctrapin reg_cog_ctra_ctrbpin))
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I6:
                if (testBit64 reg_cog_ctra_phase 0I20):
                    true:
                        let outp_cog_ctra_pin_out (shl32 0I1 reg_cog_ctra_ctrapin)
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I7:
                let outp_cog_ctra_pin_out (shl32 0I1 (mux32 (testBit64 reg_cog_ctra_phase 0I20) reg_cog_ctra_ctrapin reg_cog_ctra_ctrbpin))
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I8:
                if posedge_clk_cog:
                    true:
                        if reg_cog_ctra_delayed0:
                            true:
                                let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
                        let reg_cog_ctra_delayed1 reg_cog_ctra_delayed0
                        let reg_cog_ctra_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctra_ctrapin) 0I1) 0I1)
            case 0I9:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (notB reg_cog_ctra_delayed0):
                    true:
                        let outp_cog_ctra_pin_out (shl32 0I1 reg_cog_ctra_ctrbpin)
                if posedge_clk_cog:
                    true:
                        if reg_cog_ctra_delayed0:
                            true:
                                let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
                        let reg_cog_ctra_delayed1 reg_cog_ctra_delayed0
                        let reg_cog_ctra_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctra_ctrapin) 0I1) 0I1)
            case 0Ia:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        if (andB reg_cog_ctra_delayed0 (notB reg_cog_ctra_delayed1)):
                            true:
                                let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
                        let reg_cog_ctra_delayed1 reg_cog_ctra_delayed0
                        let reg_cog_ctra_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctra_ctrapin) 0I1) 0I1)
            case 0Ib:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (notB reg_cog_ctra_delayed0):
                    true:
                        let outp_cog_ctra_pin_out (shl32 0I1 reg_cog_ctra_ctrbpin)
                if posedge_clk_cog:
                    true:
                        if (andB reg_cog_ctra_delayed0 (notB reg_cog_ctra_delayed1)):
                            true:
                                let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
                        let reg_cog_ctra_delayed1 reg_cog_ctra_delayed0
                        let reg_cog_ctra_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctra_ctrapin) 0I1) 0I1)
            case 0Ic:
                if posedge_clk_cog:
                    true:
                        if (notB reg_cog_ctra_delayed0):
                            true:
                                let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
                        let reg_cog_ctra_delayed1 reg_cog_ctra_delayed0
                        let reg_cog_ctra_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctra_ctrapin) 0I1) 0I1)
            case 0Id:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (notB reg_cog_ctra_delayed0):
                    true:
                        let outp_cog_ctra_pin_out (shl32 0I1 reg_cog_ctra_ctrbpin)
                if posedge_clk_cog:
                    true:
                        if (notB reg_cog_ctra_delayed0):
                            true:
                                let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
                        let reg_cog_ctra_delayed1 reg_cog_ctra_delayed0
                        let reg_cog_ctra_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctra_ctrapin) 0I1) 0I1)
            case 0Ie:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        if (andB (notB reg_cog_ctra_delayed0) reg_cog_ctra_delayed1):
                            true:
                                let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
                        let reg_cog_ctra_delayed1 reg_cog_ctra_delayed0
                        let reg_cog_ctra_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctra_ctrapin) 0I1) 0I1)
            case 0If:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (notB reg_cog_ctra_delayed0):
                    true:
                        let outp_cog_ctra_pin_out (or32 0I0 (shl32 0I1 reg_cog_ctra_ctrbpin))
                if posedge_clk_cog:
                    true:
                        if (andB (notB reg_cog_ctra_delayed0) reg_cog_ctra_delayed1):
                            true:
                                let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
                        let reg_cog_ctra_delayed1 reg_cog_ctra_delayed0
                        let reg_cog_ctra_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctra_ctrapin) 0I1) 0I1)
            case 0I10:
            case 0I11:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (andB (notB reg_cog_ctra_delayed1) (notB reg_cog_ctra_delayed0))):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I12:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (andB (notB reg_cog_ctra_delayed1) reg_cog_ctra_delayed0)):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I13:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (notB reg_cog_ctra_delayed1)):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I14:
                if (andB posedge_clk_cog (andB reg_cog_ctra_delayed1 (notB reg_cog_ctra_delayed0))):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I15:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (notB reg_cog_ctra_delayed0)):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I16:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (neqB reg_cog_ctra_delayed1 reg_cog_ctra_delayed0)):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I17:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (notB (andB reg_cog_ctra_delayed1 reg_cog_ctra_delayed0))):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I18:
                if (andB posedge_clk_cog (andB reg_cog_ctra_delayed1 reg_cog_ctra_delayed0)):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I19:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (eqB reg_cog_ctra_delayed1 reg_cog_ctra_delayed0)):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I1a:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog reg_cog_ctra_delayed0):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I1b:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctra_pllcounter (and64 (add64 reg_cog_ctra_pllcounter (cast64 reg_cog_ctra_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (orB reg_cog_ctra_delayed0 (notB reg_cog_ctra_delayed1))):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I1c:
                if (andB posedge_clk_cog reg_cog_ctra_delayed1):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I1d:
                if (andB posedge_clk_cog (orB (notB reg_cog_ctra_delayed0) reg_cog_ctra_delayed1)):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I1e:
                if (andB posedge_clk_cog (orB reg_cog_ctra_delayed0 reg_cog_ctra_delayed1)):
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
            case 0I1f:
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctra_phase (add64 (and64 reg_cog_ctra_phase 0Lffffffff) (cast64 reg_cog_ctra_frequency))
        if (geq32 reg_cog_ctra_ctrmode 0I10):
            true:
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctra_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctra_ctrapin) 0I1) 0I1)
                        let reg_cog_ctra_delayed1 (eq32 (and32 (shr32 pin_in reg_cog_ctra_ctrbpin) 0I1) 0I1)
        if posedge_clk_cog:
            true:
                if (andB wio (eq32 instr_dst 0I1fc)):
                    true:
                        let reg_cog_ctra_phase (cast64 outp_cog_alu_r)
                if (andB wio (eq32 instr_dst 0I1fa)):
                    true:
                        let reg_cog_ctra_frequency outp_cog_alu_r
        if (orB posedge_clk_cog negedge_ena):
            true:
                if (notB ena):
                    true:
                        let reg_cog_ctra_ctrmode 0I0
                        let reg_cog_ctra_ctrplldiv 0I0
                        let reg_cog_ctra_ctrbpin 0I0
                        let reg_cog_ctra_ctrapin 0I0
                    false:
                        if (andB wio (eq32 instr_dst 0I1f8)):
                            true:
                                let reg_cog_ctra_ctrmode (and32 (shr32 outp_cog_alu_r 0I1a) 0I3f)
                                let reg_cog_ctra_ctrplldiv (and32 (shr32 outp_cog_alu_r 0I17) 0I7)
                                let reg_cog_ctra_ctrbpin (and32 (shr32 outp_cog_alu_r 0I9) 0I1f)
                                let reg_cog_ctra_ctrapin (and32 outp_cog_alu_r 0I1f)
        let outp_cog_ctrb_phs reg_cog_ctrb_phase
        let outp_cog_ctrb_pin_out 0I0
        switch reg_cog_ctrb_ctrmode:
            case 0I0:
            case 0I1:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I2:
                if reg_cog_ctrb_pll_saved:
                    true:
                        let outp_cog_ctrb_pin_out (shl32 0I1 reg_cog_ctrb_ctrapin)
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I3:
                let outp_cog_ctrb_pin_out (shl32 0I1 (mux32 reg_cog_ctrb_pll_saved reg_cog_ctrb_ctrapin reg_cog_ctrb_ctrbpin))
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I4:
                if (testBit64 reg_cog_ctrb_phase 0I1f):
                    true:
                        let outp_cog_ctrb_pin_out (shl32 0I1 reg_cog_ctrb_ctrapin)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I5:
                let outp_cog_ctrb_pin_out (shl32 0I1 (mux32 (testBit64 reg_cog_ctrb_phase 0I1f) reg_cog_ctrb_ctrapin reg_cog_ctrb_ctrbpin))
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I6:
                if (testBit64 reg_cog_ctrb_phase 0I20):
                    true:
                        let outp_cog_ctrb_pin_out (shl32 0I1 reg_cog_ctrb_ctrapin)
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I7:
                let outp_cog_ctrb_pin_out (shl32 0I1 (mux32 (testBit64 reg_cog_ctrb_phase 0I20) reg_cog_ctrb_ctrapin reg_cog_ctrb_ctrbpin))
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I8:
                if posedge_clk_cog:
                    true:
                        if reg_cog_ctrb_delayed0:
                            true:
                                let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
                        let reg_cog_ctrb_delayed1 reg_cog_ctrb_delayed0
                        let reg_cog_ctrb_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctrb_ctrapin) 0I1) 0I1)
            case 0I9:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (notB reg_cog_ctrb_delayed0):
                    true:
                        let outp_cog_ctrb_pin_out (shl32 0I1 reg_cog_ctrb_ctrbpin)
                if posedge_clk_cog:
                    true:
                        if reg_cog_ctrb_delayed0:
                            true:
                                let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
                        let reg_cog_ctrb_delayed1 reg_cog_ctrb_delayed0
                        let reg_cog_ctrb_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctrb_ctrapin) 0I1) 0I1)
            case 0Ia:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        if (andB reg_cog_ctrb_delayed0 (notB reg_cog_ctrb_delayed1)):
                            true:
                                let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
                        let reg_cog_ctrb_delayed1 reg_cog_ctrb_delayed0
                        let reg_cog_ctrb_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctrb_ctrapin) 0I1) 0I1)
            case 0Ib:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (notB reg_cog_ctrb_delayed0):
                    true:
                        let outp_cog_ctrb_pin_out (shl32 0I1 reg_cog_ctrb_ctrbpin)
                if posedge_clk_cog:
                    true:
                        if (andB reg_cog_ctrb_delayed0 (notB reg_cog_ctrb_delayed1)):
                            true:
                                let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
                        let reg_cog_ctrb_delayed1 reg_cog_ctrb_delayed0
                        let reg_cog_ctrb_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctrb_ctrapin) 0I1) 0I1)
            case 0Ic:
                if posedge_clk_cog:
                    true:
                        if (notB reg_cog_ctrb_delayed0):
                            true:
                                let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
                        let reg_cog_ctrb_delayed1 reg_cog_ctrb_delayed0
                        let reg_cog_ctrb_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctrb_ctrapin) 0I1) 0I1)
            case 0Id:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (notB reg_cog_ctrb_delayed0):
                    true:
                        let outp_cog_ctrb_pin_out (shl32 0I1 reg_cog_ctrb_ctrbpin)
                if posedge_clk_cog:
                    true:
                        if (notB reg_cog_ctrb_delayed0):
                            true:
                                let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
                        let reg_cog_ctrb_delayed1 reg_cog_ctrb_delayed0
                        let reg_cog_ctrb_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctrb_ctrapin) 0I1) 0I1)
            case 0Ie:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if posedge_clk_cog:
                    true:
                        if (andB (notB reg_cog_ctrb_delayed0) reg_cog_ctrb_delayed1):
                            true:
                                let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
                        let reg_cog_ctrb_delayed1 reg_cog_ctrb_delayed0
                        let reg_cog_ctrb_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctrb_ctrapin) 0I1) 0I1)
            case 0If:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (notB reg_cog_ctrb_delayed0):
                    true:
                        let outp_cog_ctrb_pin_out (or32 0I0 (shl32 0I1 reg_cog_ctrb_ctrbpin))
                if posedge_clk_cog:
                    true:
                        if (andB (notB reg_cog_ctrb_delayed0) reg_cog_ctrb_delayed1):
                            true:
                                let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
                        let reg_cog_ctrb_delayed1 reg_cog_ctrb_delayed0
                        let reg_cog_ctrb_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctrb_ctrapin) 0I1) 0I1)
            case 0I10:
            case 0I11:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (andB (notB reg_cog_ctrb_delayed1) (notB reg_cog_ctrb_delayed0))):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I12:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (andB (notB reg_cog_ctrb_delayed1) reg_cog_ctrb_delayed0)):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I13:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (notB reg_cog_ctrb_delayed1)):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I14:
                if (andB posedge_clk_cog (andB reg_cog_ctrb_delayed1 (notB reg_cog_ctrb_delayed0))):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I15:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (notB reg_cog_ctrb_delayed0)):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I16:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (neqB reg_cog_ctrb_delayed1 reg_cog_ctrb_delayed0)):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I17:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (notB (andB reg_cog_ctrb_delayed1 reg_cog_ctrb_delayed0))):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I18:
                if (andB posedge_clk_cog (andB reg_cog_ctrb_delayed1 reg_cog_ctrb_delayed0)):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I19:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (eqB reg_cog_ctrb_delayed1 reg_cog_ctrb_delayed0)):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I1a:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog reg_cog_ctrb_delayed0):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I1b:
                if posedge_clk_pll:
                    true:
                        let reg_cog_ctrb_pllcounter (and64 (add64 reg_cog_ctrb_pllcounter (cast64 reg_cog_ctrb_frequency)) 0Lfffffffff)
                if (andB posedge_clk_cog (orB reg_cog_ctrb_delayed0 (notB reg_cog_ctrb_delayed1))):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I1c:
                if (andB posedge_clk_cog reg_cog_ctrb_delayed1):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I1d:
                if (andB posedge_clk_cog (orB (notB reg_cog_ctrb_delayed0) reg_cog_ctrb_delayed1)):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I1e:
                if (andB posedge_clk_cog (orB reg_cog_ctrb_delayed0 reg_cog_ctrb_delayed1)):
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
            case 0I1f:
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctrb_phase (add64 (and64 reg_cog_ctrb_phase 0Lffffffff) (cast64 reg_cog_ctrb_frequency))
        if (geq32 reg_cog_ctrb_ctrmode 0I10):
            true:
                if posedge_clk_cog:
                    true:
                        let reg_cog_ctrb_delayed0 (eq32 (and32 (shr32 pin_in reg_cog_ctrb_ctrapin) 0I1) 0I1)
                        let reg_cog_ctrb_delayed1 (eq32 (and32 (shr32 pin_in reg_cog_ctrb_ctrbpin) 0I1) 0I1)
        if posedge_clk_cog:
            true:
                if (andB wio (eq32 instr_dst 0I1fd)):
                    true:
                        let reg_cog_ctrb_phase (cast64 outp_cog_alu_r)
                if (andB wio (eq32 instr_dst 0I1fb)):
                    true:
                        let reg_cog_ctrb_frequency outp_cog_alu_r
        if (orB posedge_clk_cog negedge_ena):
            true:
                if (notB ena):
                    true:
                        let reg_cog_ctrb_ctrmode 0I0
                        let reg_cog_ctrb_ctrplldiv 0I0
                        let reg_cog_ctrb_ctrbpin 0I0
                        let reg_cog_ctrb_ctrapin 0I0
                    false:
                        if (andB wio (eq32 instr_dst 0I1f9)):
                            true:
                                let reg_cog_ctrb_ctrmode (and32 (shr32 outp_cog_alu_r 0I1a) 0I3f)
                                let reg_cog_ctrb_ctrplldiv (and32 (shr32 outp_cog_alu_r 0I17) 0I7)
                                let reg_cog_ctrb_ctrbpin (and32 (shr32 outp_cog_alu_r 0I9) 0I1f)
                                let reg_cog_ctrb_ctrapin (and32 outp_cog_alu_r 0I1f)
        if (orB (eq32 state 0I3) (eq32 state 0I4)):
            true:
                let sx (mux32 (testBit32 i 0I16) instr_src (mux32 (eq32 instr_src 0I1f0) (and32 (shr32 progctr 0Ic) 0Ifffc) (mux32 (eq32 instr_src 0I1f1) cnt (mux32 (eq32 instr_src 0I1f2) pin_in (mux32 (eq32 instr_src 0I1fc) (lower32 outp_cog_ctra_phs) (mux32 (eq32 instr_src 0I1fd) (lower32 outp_cog_ctrb_phs) sy_reg))))))
                let px (and32 (mux32 (andB cond jump) sx p_reg) 0I1ff)
        let loc_cog_vid_local_enable (neq32 reg_cog_vid_vcfg_vmode 0I0)
        let loc_cog_vid_local_capr_next reg_cog_vid_capr
        let outp_cog_vid_ack reg_cog_vid_snc0
        switch reg_cog_vid_vcfg_vmode:
            case 0I3:
                let outp_cog_vid_pin_out (shl32 (and32 (add32 (add32 (shl32 reg_cog_vid_baseband 0I4) (mux32 (neqB pllb_saved (testBit32 pll_in reg_cog_vid_vcfg_auralsub)) 0I8 0I0)) (mux32 pllb_saved (sub32 0I7 (shr32 (add32 reg_cog_vid_composite 0I1) 0I1)) (and32 (shr32 reg_cog_vid_composite 0I1) 0I3))) reg_cog_vid_vcfg_vpins) reg_cog_vid_vcfg_vgroup)
            case 0I2:
                let outp_cog_vid_pin_out (shl32 (and32 (add32 (add32 reg_cog_vid_baseband (mux32 (neqB pllb_saved (testBit32 pll_in reg_cog_vid_vcfg_auralsub)) 0I80 0I0)) (shl32 (mux32 pllb_saved (sub32 0I7 (shr32 (add32 reg_cog_vid_composite 0I1) 0I1)) (and32 (shr32 reg_cog_vid_composite 0I1) 0I3)) 0I4)) reg_cog_vid_vcfg_vpins) reg_cog_vid_vcfg_vgroup)
            case 0I1:
                let outp_cog_vid_pin_out (shl32 (and32 reg_cog_vid_discrete reg_cog_vid_vcfg_vpins) reg_cog_vid_vcfg_vgroup)
            case 0I0:
                let outp_cog_vid_pin_out 0I0
        if (orB posedge_vclk posedge_snc1):
            true:
                let loc_cog_vid_local_new_set (eq32 reg_cog_vid_setr 0I1)
                let loc_cog_vid_local_new_cnt (eq32 reg_cog_vid_cnt0 0I1)
                if reg_cog_vid_snc1:
                    true:
                        let loc_cog_vid_local_capr_next false
                    false:
                        if loc_cog_vid_local_new_set:
                            true:
                                let loc_cog_vid_local_capr_next true
                if posedge_vclk:
                    true:
                        let loc_cog_vid_local_colorphs false
                        let loc_cog_vid_local_colormod reg_cog_vid_discrete
                        if (neq32 (and32 reg_cog_vid_discrete 0I8) 0I0):
                            true:
                                let loc_cog_vid_local_colorphs (neq32 (and32 (add32 (and32 (shr32 reg_cog_vid_discrete 0I4) 0If) reg_cog_vid_phase) 0I8) 0I0)
                                let loc_cog_vid_local_colormod (add32 reg_cog_vid_discrete (mux32 loc_cog_vid_local_colorphs 0I7 0I1))
                        let reg_cog_vid_cnt0 (and32 (mux32 loc_cog_vid_local_new_set reg_cog_vid_vscl_pixelclocks (mux32 loc_cog_vid_local_new_cnt reg_cog_vid_cnts (sub32 reg_cog_vid_cnt0 0I1))) 0Iff)
                        let reg_cog_vid_setr (and32 (mux32 loc_cog_vid_local_new_set reg_cog_vid_vscl_frameclocks (sub32 reg_cog_vid_setr 0I1)) 0Ifff)
                        if loc_cog_vid_local_new_set:
                            true:
                                let reg_cog_vid_cnts (and32 reg_cog_vid_vscl_pixelclocks 0Iff)
                        let reg_cog_vid_phase (and32 (add32 reg_cog_vid_phase 0I1) 0If)
                        let reg_cog_vid_baseband (add32 (mux32 loc_cog_vid_local_colorphs 0I8 0I0) (and32 (mux32 reg_cog_vid_vcfg_chroma0 loc_cog_vid_local_colormod reg_cog_vid_discrete) 0I7))
                        let reg_cog_vid_composite (and32 (mux32 reg_cog_vid_vcfg_chroma1 loc_cog_vid_local_colormod reg_cog_vid_discrete) 0I7)
                        if (andB reg_cog_vid_vcfg_cmode (eq32 (and32 reg_cog_vid_saved_pixels 0I3) 0I3)):
                            true:
                                let reg_cog_vid_discrete (and32 (shr32 reg_cog_vid_saved_colors 0I18) 0Iff)
                            false:
                                if (andB reg_cog_vid_vcfg_cmode (eq32 (and32 reg_cog_vid_saved_pixels 0I3) 0I2)):
                                    true:
                                        let reg_cog_vid_discrete (and32 (shr32 reg_cog_vid_saved_colors 0I10) 0Iff)
                                    false:
                                        if (eq32 (and32 reg_cog_vid_saved_pixels 0I1) 0I1):
                                            true:
                                                let reg_cog_vid_discrete (and32 (shr32 reg_cog_vid_saved_colors 0I8) 0Iff)
                                            false:
                                                let reg_cog_vid_discrete (and32 reg_cog_vid_saved_colors 0Iff)
                        if loc_cog_vid_local_new_set:
                            true:
                                let reg_cog_vid_saved_pixels source
                                let reg_cog_vid_saved_colors dest
                            false:
                                if loc_cog_vid_local_new_cnt:
                                    true:
                                        let reg_cog_vid_saved_pixels (mux32 reg_cog_vid_vcfg_cmode (or32 (and32 reg_cog_vid_saved_pixels 0Ic0000000) (shr32 reg_cog_vid_saved_pixels 0I2)) (or32 (and32 reg_cog_vid_saved_pixels 0I80000000) (shr32 reg_cog_vid_saved_pixels 0I1)))
        if (orB posedge_clk_cog negedge_ena):
            true:
                if (notB ena):
                    true:
                        let reg_cog_vid_vcfg_vmode 0I0
                        let reg_cog_vid_vcfg_cmode false
                        let reg_cog_vid_vcfg_chroma1 false
                        let reg_cog_vid_vcfg_chroma0 false
                        let reg_cog_vid_vcfg_auralsub 0I0
                        let reg_cog_vid_vcfg_vgroup 0I0
                        let reg_cog_vid_vcfg_vpins 0I0
                    false:
                        if (andB wio (eq32 instr_dst 0I1fe)):
                            true:
                                let reg_cog_vid_vcfg_vmode (and32 (shr32 outp_cog_alu_r 0I1d) 0I3)
                                let reg_cog_vid_vcfg_cmode (eq32 (and32 (shr32 outp_cog_alu_r 0I1c) 0I1) 0I1)
                                let reg_cog_vid_vcfg_chroma1 (eq32 (and32 (shr32 outp_cog_alu_r 0I1b) 0I1) 0I1)
                                let reg_cog_vid_vcfg_chroma0 (eq32 (and32 (shr32 outp_cog_alu_r 0I1a) 0I1) 0I1)
                                let reg_cog_vid_vcfg_auralsub (and32 (shr32 outp_cog_alu_r 0I17) 0I7)
                                let reg_cog_vid_vcfg_vgroup (shl32 (and32 (shr32 outp_cog_alu_r 0I9) 0I3) 0I3)
                                let reg_cog_vid_vcfg_vpins (and32 outp_cog_alu_r 0Iff)
        if posedge_clk_cog:
            true:
                if (andB wio (eq32 instr_dst 0I1ff)):
                    true:
                        let reg_cog_vid_vscl_pixelclocks (and32 (shr32 outp_cog_alu_r 0Ic) 0Iff)
                        let reg_cog_vid_vscl_frameclocks (and32 outp_cog_alu_r 0Ifff)
                if loc_cog_vid_local_enable:
                    true:
                        let reg_cog_vid_snc1 reg_cog_vid_snc0
                        let reg_cog_vid_snc0 reg_cog_vid_capr
        let reg_cog_vid_capr loc_cog_vid_local_capr_next
        let pin_out (and32 (or32 (or32 (or32 outa outp_cog_ctra_pin_out) outp_cog_ctrb_pin_out) outp_cog_vid_pin_out) dira)
        let pin_dir dira
        let in_cog_ram_a (mux32 (eq32 state 0I3) px (mux32 (eq32 state 0I1) instr_src instr_dst))
        let outp_cog_ram_q reg_cog_ram_q_reg
        if (andB posedge_clk_cog (orB (inRange32 state 0I1 0I3) (andB (andB (eq32 state 0I4) cond) (testBit32 i 0I17)))):
            true:
                let reg_cog_ram_q_reg (arrayAccess reg_cog_ram_r in_cog_ram_a)
                if (andB (eq32 state 0I4) outp_cog_alu_wr):
                    true:
                        letarr reg_cog_ram_r in_cog_ram_a outp_cog_alu_r
        if (orB posedge_clk_cog negedge_nres):
            true:
                if (notB nres):
                    true:
                        let progctr 0I3e00
                    false:
                        if (andB ena_bus ptr_w):
                            true:
                                let progctr ptr_d
        let match_prev match
        if (orB posedge_clk_cog negedge_ena):
            true:
                if (notB ena):
                    true:
                        let running false
                        let p_reg 0I0
                        let flags 0I0
                        let dira 0I0
                        let cancel false
                    false:
                        if (eq32 state 0I4):
                            true:
                                if (eq32 px 0I1ff):
                                    true:
                                        let running true
                                if (notB (andB cond jump_cancel)):
                                    true:
                                        let p_reg (and32 (add32 px 0I1) 0I1ff)
                                if (andB cond (testBit32 i 0I18)):
                                    true:
                                        let flags (mux32 outp_cog_alu_co (or32 flags 0I2) (and32 flags 0I1))
                                if (andB cond (testBit32 i 0I19)):
                                    true:
                                        let flags (mux32 outp_cog_alu_zo (or32 flags 0I1) (and32 flags 0I2))
                                let cancel (orB (andB cond jump_cancel) (eq32 px 0I1ff))
                        if (andB wio (eq32 instr_dst 0I1f6)):
                            true:
                                let dira outp_cog_alu_r
                if posedge_clk_cog:
                    true:
                        if (andB wio (eq32 instr_dst 0I1f4)):
                            true:
                                let outa outp_cog_alu_r
                        if (eq32 state 0I4):
                            true:
                                let instruction_reg outp_cog_ram_q
                        if (eq32 state 0I2):
                            true:
                                let sy_reg outp_cog_ram_q
                        let match (andB (eq32 state 0I5) (neqB (eq32 (and32 instr_opcode 0I3) 0I1) (eq32 (mux32 (testBit32 i 0I1b) cnt (and32 pin_in source)) dest)))
                        if (eq32 state 0I3):
                            true:
                                let source sx
                                let dest outp_cog_ram_q
                if (notB ena):
                    true:
                        let state 0I0
                    false:
                        switch state:
                            case 0I0:
                                let state 0I1
                            case 0I1:
                                let state 0I2
                            case 0I2:
                                let state 0I3
                            case 0I3 0I5:
                                let state (mux32 (andB cond (muxB (eq32 (and32 instr_opcode 0I3c) 0I0) (notB bus_ack) (muxB (orB (eq32 (and32 instr_opcode 0I3e) 0I3c) (eq32 instr_opcode 0I3e)) (notB match_prev) (andB (eq32 instr_opcode 0I3f) (notB outp_cog_vid_ack))))) 0I5 0I4)
                            case 0I4:
                                let state 0I1
